Verification Notes (Part 2:Block Level-Verilog)
Overview
So we’re looking at a block level digital unit here, which basically means that at a conceptual level conventional methods for testing an uncomplicated electronic device apply on the nose.
As we’ve been taught in digital electronics lectures, there are several ways to describe the logic functions of a digital unit: standard expressions (SOP or POS) and truth table or a sample waveform graph that demonstrates equivalent information.(To keep things simple and easy to articulate I’m gonna begin by assuming we’re dealing with combinational logic only as this is just the outline of the general methodologies I apply.)
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